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<div class="title">drv_acc_lis3dh_types.h</div>  </div>
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<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;<span class="comment">/*</span></div><div class="line"><a name="l00002"></a><span class="lineno">    2</span>&#160;<span class="comment">  Copyright (c) 2010 - 2017, Nordic Semiconductor ASA</span></div><div class="line"><a name="l00003"></a><span class="lineno">    3</span>&#160;<span class="comment">  All rights reserved.</span></div><div class="line"><a name="l00004"></a><span class="lineno">    4</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00005"></a><span class="lineno">    5</span>&#160;<span class="comment">  Redistribution and use in source and binary forms, with or without modification,</span></div><div class="line"><a name="l00006"></a><span class="lineno">    6</span>&#160;<span class="comment">  are permitted provided that the following conditions are met:</span></div><div class="line"><a name="l00007"></a><span class="lineno">    7</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00008"></a><span class="lineno">    8</span>&#160;<span class="comment">  1. Redistributions of source code must retain the above copyright notice, this</span></div><div class="line"><a name="l00009"></a><span class="lineno">    9</span>&#160;<span class="comment">     list of conditions and the following disclaimer.</span></div><div class="line"><a name="l00010"></a><span class="lineno">   10</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00011"></a><span class="lineno">   11</span>&#160;<span class="comment">  2. Redistributions in binary form, except as embedded into a Nordic</span></div><div class="line"><a name="l00012"></a><span class="lineno">   12</span>&#160;<span class="comment">     Semiconductor ASA integrated circuit in a product or a software update for</span></div><div class="line"><a name="l00013"></a><span class="lineno">   13</span>&#160;<span class="comment">     such product, must reproduce the above copyright notice, this list of</span></div><div class="line"><a name="l00014"></a><span class="lineno">   14</span>&#160;<span class="comment">     conditions and the following disclaimer in the documentation and/or other</span></div><div class="line"><a name="l00015"></a><span class="lineno">   15</span>&#160;<span class="comment">     materials provided with the distribution.</span></div><div class="line"><a name="l00016"></a><span class="lineno">   16</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00017"></a><span class="lineno">   17</span>&#160;<span class="comment">  3. Neither the name of Nordic Semiconductor ASA nor the names of its</span></div><div class="line"><a name="l00018"></a><span class="lineno">   18</span>&#160;<span class="comment">     contributors may be used to endorse or promote products derived from this</span></div><div class="line"><a name="l00019"></a><span class="lineno">   19</span>&#160;<span class="comment">     software without specific prior written permission.</span></div><div class="line"><a name="l00020"></a><span class="lineno">   20</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;<span class="comment">  4. This software, with or without modification, must only be used with a</span></div><div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;<span class="comment">     Nordic Semiconductor ASA integrated circuit.</span></div><div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="comment">  5. Any software provided in binary form under this license must not be reverse</span></div><div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;<span class="comment">     engineered, decompiled, modified and/or disassembled.</span></div><div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<span class="comment">  THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA &quot;AS IS&quot; AND ANY EXPRESS</span></div><div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;<span class="comment">  OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES</span></div><div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;<span class="comment">  OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE</span></div><div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;<span class="comment">  DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE</span></div><div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;<span class="comment">  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</span></div><div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;<span class="comment">  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE</span></div><div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;<span class="comment">  GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)</span></div><div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;<span class="comment">  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT</span></div><div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;<span class="comment">  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT</span></div><div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;<span class="comment">  OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</span></div><div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;</div><div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;<span class="preprocessor">#ifndef __DRV_ACC_LIS3DH_TYPES_H__</span></div><div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;<span class="preprocessor">#define __DRV_ACC_LIS3DH_TYPES_H__</span></div><div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;</div><div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;<span class="preprocessor">#include &lt;stdint.h&gt;</span></div><div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;</div><div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#ga0e9afd8ad27de0920d1fe0738834869c">   54</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">enum</span></div><div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;{</div><div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca651251b680468ae6418ce5e4881dd77f">   56</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca651251b680468ae6418ce5e4881dd77f">ODR_1Hz</a>                 = 0x01,   </div><div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca3c93731a8c7fd26b42d3c1c7e0e04a16">   57</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca3c93731a8c7fd26b42d3c1c7e0e04a16">ODR_10Hz</a>                = 0x02,   </div><div class="line"><a name="l00058"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca89fb9bb7746edff5df4e510e45a901c7">   58</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca89fb9bb7746edff5df4e510e45a901c7">ODR_25Hz</a>                = 0x03,   </div><div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca96068b1baf9cd8b2e3e4fcff8e79ba65">   59</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca96068b1baf9cd8b2e3e4fcff8e79ba65">ODR_50Hz</a>                = 0x04,   </div><div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca52b611011f7bd3c0c447fc69c124d431">   60</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca52b611011f7bd3c0c447fc69c124d431">ODR_100Hz</a>               = 0x05,   </div><div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca9f6133db3f2734f33ae2ca76ab4ef2ad">   61</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca9f6133db3f2734f33ae2ca76ab4ef2ad">ODR_200Hz</a>               = 0x06,   </div><div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869cac7b7c0d5277d1af336dfc9cc8209b45f">   62</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869cac7b7c0d5277d1af336dfc9cc8209b45f">ODR_400Hz</a>               = 0x07,   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href="group__lis3dh__acc.html#gga12c0d2c58f6ec2f4f2b2af14681e532fa04ef9c54bf8fecf6499edcc41b7281d7">LOW_POWER</a>               = 0x01,   </div><div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga12c0d2c58f6ec2f4f2b2af14681e532fa50d1448013c6f17125caee18aa418af7">   73</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga12c0d2c58f6ec2f4f2b2af14681e532fa50d1448013c6f17125caee18aa418af7">NORMAL</a>                  = 0x02    </div><div class="line"><a name="l00074"></a><span class="lineno">   74</span>&#160;} <a class="code" href="group__lis3dh__acc.html#ga12c0d2c58f6ec2f4f2b2af14681e532f">Mode_t</a>;</div><div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;</div><div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#ga47b3efbcdf74ade8db84a79cbe0a6208">   78</a></span>&#160;<span class="keyword">typedef</span> <span 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href="group__lis3dh__acc.html#gad2021482d4a30768e22af92782a56a3c">   88</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">enum</span></div><div class="line"><a name="l00089"></a><span class="lineno">   89</span>&#160;{</div><div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#ggad2021482d4a30768e22af92782a56a3ca7e45205907f6c1ac72454ce21f06853f">   90</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#ggad2021482d4a30768e22af92782a56a3ca7e45205907f6c1ac72454ce21f06853f">X_ENABLE</a>                = 0x01,   </div><div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#ggad2021482d4a30768e22af92782a56a3cadd16b30f2ce9d92c86b0ba1c205cc1a1">   91</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#ggad2021482d4a30768e22af92782a56a3cadd16b30f2ce9d92c86b0ba1c205cc1a1">Y_ENABLE</a>                = 0x02,   </div><div class="line"><a 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class="line" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559abb0f1ea6dfe7b72208878f088f9f363b">   99</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559abb0f1ea6dfe7b72208878f088f9f363b">IntOR</a>                   = 0x00,   </div><div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559ac97c6350bafea7d79fbafe042e1fe4d6">  100</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559ac97c6350bafea7d79fbafe042e1fe4d6">Int6DMov</a>                = 0x01,   </div><div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a9f809ea4bc2b111d3b9ec0da8e0178d8">  101</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a9f809ea4bc2b111d3b9ec0da8e0178d8">IntAND</a>                  = 0x02,   </div><div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a9106def51953964bf1c2c243ef23e3b6">  102</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a9106def51953964bf1c2c243ef23e3b6">Int6DPos</a>                = 0x03,   </div><div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a617b1566d064a8d14f765c303e373237">  103</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a617b1566d064a8d14f765c303e373237">Int4DMov</a>                = 0x05,   </div><div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a7a261cd8c207e17b3776e8ad97c4e400">  104</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a7a261cd8c207e17b3776e8ad97c4e400">Int4DPos</a>                = 0x07,   </div><div class="line"><a name="l00105"></a><span class="lineno">  105</span>&#160;} <a class="code" href="group__lis3dh__acc.html#ga27fa536bd7810818a8e1c3f40b20a559">IntMode_t</a>;</div><div class="line"><a name="l00106"></a><span class="lineno">  106</span>&#160;</div><div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gae04a01b91dcf6d67ac00cc8170bfa69a">  109</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">enum</span></div><div class="line"><a name="l00110"></a><span class="lineno">  110</span>&#160;{</div><div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#ggae04a01b91dcf6d67ac00cc8170bfa69aae1edcead6e4d2fe417f6802d2da8ace7">  111</a></span>&#160;  <a class="code" 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href="group__lis3dh__acc.html#gaab84012c26574a34c9334e573449a939">ClickMode_t</a>;</div><div class="line"><a name="l00122"></a><span class="lineno">  122</span>&#160;</div><div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#gaf5e10f607b847f3b716c9ec38d151cc9">  125</a></span>&#160;<span class="keyword">typedef</span> <span class="keyword">enum</span></div><div class="line"><a name="l00126"></a><span class="lineno">  126</span>&#160;{</div><div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a8dea92e23405fb11e8b5515d6fe5e337">  127</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a8dea92e23405fb11e8b5515d6fe5e337">HPNormalRes</a>             = 0x00,    </div><div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a07c4040b2477d3236a1749674a5a8ceb">  128</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a07c4040b2477d3236a1749674a5a8ceb">HPReference</a>             = 0x01,    </div><div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a29c408165112bfcbb9b17bcf2c16de68">  129</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a29c408165112bfcbb9b17bcf2c16de68">HPNormal</a>                = 0x02,    </div><div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a22ef545df51e65a06c8e7e01f7393607">  130</a></span>&#160;  <a class="code" href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a22ef545df51e65a06c8e7e01f7393607">HPAutoResInt</a>            = 0x03     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BIT_2</span></div><div class="line"><a name="l00208"></a><span class="lineno">  208</span>&#160;<span class="preprocessor">#define CTRL_REG5_LIR_INT2              BIT_1</span></div><div class="line"><a name="l00209"></a><span class="lineno">  209</span>&#160;<span class="preprocessor">#define CTRL_REG5_D4D_INT2              BIT_0</span></div><div class="line"><a name="l00210"></a><span class="lineno">  210</span>&#160;</div><div class="line"><a name="l00211"></a><span class="lineno">  211</span>&#160;<span class="comment">// Control register 6</span></div><div class="line"><a name="l00212"></a><span class="lineno">  212</span>&#160;<span class="preprocessor">#define CTRL_REG6                       0x25</span></div><div class="line"><a name="l00213"></a><span class="lineno">  213</span>&#160;<span class="preprocessor">#define CTRL_REG_6_I2_CLICK             BIT_7</span></div><div class="line"><a name="l00214"></a><span class="lineno">  214</span>&#160;<span class="preprocessor">#define CTRL_REG_6_I2_IA1               BIT_6</span></div><div class="line"><a name="l00215"></a><span class="lineno">  215</span>&#160;<span class="preprocessor">#define CTRL_REG_6_I2_IA2               BIT_5</span></div><div class="line"><a name="l00216"></a><span class="lineno">  216</span>&#160;<span class="preprocessor">#define CTRL_REG_6_I2_BOOT              BIT_4</span></div><div class="line"><a name="l00217"></a><span class="lineno">  217</span>&#160;<span class="preprocessor">#define CTRL_REG_6_I2_ACT               BIT_3</span></div><div class="line"><a name="l00218"></a><span class="lineno">  218</span>&#160;<span class="preprocessor">#define CTRL_REG_6_INT_POLARITY         BIT_1</span></div><div class="line"><a name="l00219"></a><span class="lineno">  219</span>&#160;</div><div class="line"><a name="l00220"></a><span class="lineno">  220</span>&#160;<span class="comment">// Reference/datacapture register.</span></div><div class="line"><a name="l00221"></a><span class="lineno">  221</span>&#160;<span class="preprocessor">#define REFERENCE_REG                   0x26</span></div><div class="line"><a name="l00222"></a><span class="lineno">  222</span>&#160;<span class="preprocessor">#define REF0                            BIT_0</span></div><div class="line"><a name="l00223"></a><span class="lineno">  223</span>&#160;</div><div class="line"><a name="l00224"></a><span class="lineno">  224</span>&#160;<span class="comment">// Axis status register.</span></div><div class="line"><a name="l00225"></a><span class="lineno">  225</span>&#160;<span class="preprocessor">#define STATUS_REG                      0x27</span></div><div class="line"><a name="l00226"></a><span class="lineno">  226</span>&#160;<span class="preprocessor">#define ZYXOR                           BIT_7</span></div><div class="line"><a name="l00227"></a><span class="lineno">  227</span>&#160;<span class="preprocessor">#define ZOR                             BIT_6</span></div><div class="line"><a name="l00228"></a><span class="lineno">  228</span>&#160;<span class="preprocessor">#define YOR                             BIT_5</span></div><div class="line"><a name="l00229"></a><span class="lineno">  229</span>&#160;<span class="preprocessor">#define XOR                             BIT_4</span></div><div class="line"><a name="l00230"></a><span class="lineno">  230</span>&#160;<span class="preprocessor">#define ZYXDA                           BIT_3</span></div><div class="line"><a name="l00231"></a><span class="lineno">  231</span>&#160;<span class="preprocessor">#define ZDA                             BIT_2</span></div><div class="line"><a name="l00232"></a><span class="lineno">  232</span>&#160;<span class="preprocessor">#define YDA                             BIT_1</span></div><div class="line"><a name="l00233"></a><span class="lineno">  233</span>&#160;<span class="preprocessor">#define XDA                             BIT_0</span></div><div class="line"><a name="l00234"></a><span class="lineno">  234</span>&#160;</div><div class="line"><a name="l00235"></a><span class="lineno">  235</span>&#160;<span class="comment">// Acceleration data registers.</span></div><div class="line"><a name="l00236"></a><span class="lineno">  236</span>&#160;<span class="preprocessor">#define OUT_X_L                         0x28</span></div><div class="line"><a name="l00237"></a><span class="lineno">  237</span>&#160;<span class="preprocessor">#define OUT_X_H                         0x29</span></div><div class="line"><a name="l00238"></a><span class="lineno">  238</span>&#160;<span class="preprocessor">#define OUT_Y_L                         0x2A</span></div><div class="line"><a name="l00239"></a><span class="lineno">  239</span>&#160;<span class="preprocessor">#define OUT_Y_H                         0x2B</span></div><div class="line"><a name="l00240"></a><span class="lineno">  240</span>&#160;<span class="preprocessor">#define OUT_Z_L                         0x2C</span></div><div class="line"><a name="l00241"></a><span class="lineno">  241</span>&#160;<span class="preprocessor">#define OUT_Z_H                         0x2D</span></div><div class="line"><a name="l00242"></a><span class="lineno">  242</span>&#160;</div><div class="line"><a name="l00243"></a><span class="lineno">  243</span>&#160;<span class="comment">// FIFO registers.</span></div><div class="line"><a name="l00244"></a><span class="lineno">  244</span>&#160;<span class="preprocessor">#define FIFO_CTRL_REG                   0x2E</span></div><div class="line"><a name="l00245"></a><span class="lineno">  245</span>&#160;<span class="preprocessor">#define FIFO_CTRL_REG_FM1               BIT_7</span></div><div class="line"><a name="l00246"></a><span class="lineno">  246</span>&#160;<span class="preprocessor">#define FIFO_CTRL_REG_FM0               BIT_6</span></div><div class="line"><a name="l00247"></a><span class="lineno">  247</span>&#160;<span class="preprocessor">#define FIFO_CTRL_REG_TR                BIT_5</span></div><div class="line"><a name="l00248"></a><span class="lineno">  248</span>&#160;<span class="preprocessor">#define FIFO_CTRL_REG_FTH4              BIT_4</span></div><div class="line"><a name="l00249"></a><span class="lineno">  249</span>&#160;<span class="preprocessor">#define FIFO_CTRL_REG_FTH3              BIT_3</span></div><div class="line"><a name="l00250"></a><span class="lineno">  250</span>&#160;<span class="preprocessor">#define FIFO_CTRL_REG_FTH2              BIT_2</span></div><div class="line"><a name="l00251"></a><span class="lineno">  251</span>&#160;<span class="preprocessor">#define FIFO_CTRL_REG_FTH1              BIT_1</span></div><div class="line"><a name="l00252"></a><span class="lineno">  252</span>&#160;<span class="preprocessor">#define FIFO_CTRL_REG_FTH0              BIT_0</span></div><div class="line"><a name="l00253"></a><span class="lineno">  253</span>&#160;</div><div class="line"><a name="l00254"></a><span class="lineno">  254</span>&#160;<span class="preprocessor">#define FIFO_SRC_REG                    0x2F</span></div><div class="line"><a name="l00255"></a><span class="lineno">  255</span>&#160;<span class="preprocessor">#define FIFO_SRC_REG_WTM                BIT_7</span></div><div class="line"><a name="l00256"></a><span class="lineno">  256</span>&#160;<span class="preprocessor">#define FIFO_SRC_REG_OVRN_INFO          BIT_6</span></div><div class="line"><a name="l00257"></a><span class="lineno">  257</span>&#160;<span class="preprocessor">#define FIFO_SRC_REG_EMPTY              BIT_5</span></div><div class="line"><a name="l00258"></a><span class="lineno">  258</span>&#160;<span class="preprocessor">#define FIFO_SRC_REG_FSS4               BIT_4</span></div><div class="line"><a name="l00259"></a><span class="lineno">  259</span>&#160;<span class="preprocessor">#define FIFO_SRC_REG_FSS3               BIT_3</span></div><div class="line"><a name="l00260"></a><span class="lineno">  260</span>&#160;<span class="preprocessor">#define FIFO_SRC_REG_FSS2               BIT_2</span></div><div class="line"><a name="l00261"></a><span class="lineno">  261</span>&#160;<span class="preprocessor">#define FIFO_SRC_REG_FSS1               BIT_1</span></div><div class="line"><a name="l00262"></a><span class="lineno">  262</span>&#160;<span class="preprocessor">#define FIFO_SRC_REG_FSS0               BIT_0</span></div><div class="line"><a name="l00263"></a><span class="lineno">  263</span>&#160;</div><div class="line"><a name="l00264"></a><span class="lineno">  264</span>&#160;<span class="comment">// Interrupt 1 registers.</span></div><div class="line"><a name="l00265"></a><span class="lineno">  265</span>&#160;<span class="preprocessor">#define INT1_CFG                        0x30</span></div><div class="line"><a name="l00266"></a><span class="lineno">  266</span>&#160;<span class="preprocessor">#define INT1_CFG_ANDOR                  BIT_7</span></div><div class="line"><a name="l00267"></a><span class="lineno">  267</span>&#160;<span class="preprocessor">#define INT1_CFG_INT_6D                 BIT_6</span></div><div class="line"><a name="l00268"></a><span class="lineno">  268</span>&#160;<span class="preprocessor">#define INT1_CFG_ZHIE                   BIT_5</span></div><div class="line"><a name="l00269"></a><span class="lineno">  269</span>&#160;<span class="preprocessor">#define INT1_CFG_ZLIE                   BIT_4</span></div><div class="line"><a name="l00270"></a><span class="lineno">  270</span>&#160;<span class="preprocessor">#define INT1_CFG_YHIE                   BIT_3</span></div><div class="line"><a name="l00271"></a><span class="lineno">  271</span>&#160;<span class="preprocessor">#define INT1_CFG_YLIE                   BIT_2</span></div><div class="line"><a name="l00272"></a><span class="lineno">  272</span>&#160;<span class="preprocessor">#define INT1_CFG_XHIE                   BIT_1</span></div><div class="line"><a name="l00273"></a><span class="lineno">  273</span>&#160;<span class="preprocessor">#define INT1_CFG_XLIE                   BIT_0</span></div><div class="line"><a name="l00274"></a><span class="lineno">  274</span>&#160;</div><div class="line"><a name="l00275"></a><span class="lineno">  275</span>&#160;<span class="preprocessor">#define INT1_SRC                        0x31</span></div><div class="line"><a name="l00276"></a><span class="lineno">  276</span>&#160;<span class="preprocessor">#define INT1_SRC_IA                     BIT_6</span></div><div class="line"><a name="l00277"></a><span class="lineno">  277</span>&#160;<span class="preprocessor">#define INT1_SRC_ZH                     BIT_5</span></div><div class="line"><a name="l00278"></a><span class="lineno">  278</span>&#160;<span class="preprocessor">#define INT1_SRC_ZL                     BIT_4</span></div><div class="line"><a name="l00279"></a><span class="lineno">  279</span>&#160;<span class="preprocessor">#define INT1_SRC_YH                     BIT_3</span></div><div class="line"><a name="l00280"></a><span class="lineno">  280</span>&#160;<span class="preprocessor">#define INT1_SRC_YL                     BIT_2</span></div><div class="line"><a name="l00281"></a><span class="lineno">  281</span>&#160;<span class="preprocessor">#define INT1_SRC_XH                     BIT_1</span></div><div class="line"><a name="l00282"></a><span class="lineno">  282</span>&#160;<span class="preprocessor">#define INT1_SRC_XL                     BIT_0</span></div><div class="line"><a name="l00283"></a><span class="lineno">  283</span>&#160;</div><div class="line"><a name="l00284"></a><span class="lineno">  284</span>&#160;<span class="preprocessor">#define INT1_THS                        0x32</span></div><div class="line"><a name="l00285"></a><span class="lineno">  285</span>&#160;<span class="preprocessor">#define INT1_THS_THS6                   BIT_6</span></div><div class="line"><a name="l00286"></a><span class="lineno">  286</span>&#160;<span class="preprocessor">#define INT1_THS_THS5                   BIT_5</span></div><div class="line"><a name="l00287"></a><span class="lineno">  287</span>&#160;<span class="preprocessor">#define INT1_THS_THS4                   BIT_4</span></div><div class="line"><a name="l00288"></a><span class="lineno">  288</span>&#160;<span class="preprocessor">#define INT1_THS_THS3                   BIT_3</span></div><div class="line"><a name="l00289"></a><span class="lineno">  289</span>&#160;<span class="preprocessor">#define INT1_THS_THS2                   BIT_2</span></div><div class="line"><a name="l00290"></a><span class="lineno">  290</span>&#160;<span class="preprocessor">#define INT1_THS_THS1                   BIT_1</span></div><div class="line"><a name="l00291"></a><span class="lineno">  291</span>&#160;<span class="preprocessor">#define INT1_THS_THS0                   BIT_0</span></div><div class="line"><a name="l00292"></a><span class="lineno">  292</span>&#160;</div><div class="line"><a name="l00293"></a><span class="lineno">  293</span>&#160;<span class="preprocessor">#define INT1_DURATION                   0x33</span></div><div class="line"><a name="l00294"></a><span class="lineno">  294</span>&#160;<span class="preprocessor">#define INT1_DURATION_D6                BIT_6</span></div><div class="line"><a name="l00295"></a><span class="lineno">  295</span>&#160;<span class="preprocessor">#define INT1_DURATION_D5                BIT_5</span></div><div class="line"><a name="l00296"></a><span class="lineno">  296</span>&#160;<span class="preprocessor">#define INT1_DURATION_D4                BIT_4</span></div><div class="line"><a name="l00297"></a><span class="lineno">  297</span>&#160;<span class="preprocessor">#define INT1_DURATION_D3                BIT_3</span></div><div class="line"><a name="l00298"></a><span class="lineno">  298</span>&#160;<span class="preprocessor">#define INT1_DURATION_D2                BIT_2</span></div><div class="line"><a name="l00299"></a><span class="lineno">  299</span>&#160;<span class="preprocessor">#define INT1_DURATION_D1                BIT_1</span></div><div class="line"><a name="l00300"></a><span class="lineno">  300</span>&#160;<span class="preprocessor">#define INT1_DURATION_D0                BIT_0</span></div><div class="line"><a name="l00301"></a><span class="lineno">  301</span>&#160;</div><div class="line"><a name="l00302"></a><span class="lineno">  302</span>&#160;<span class="comment">// Interrupt 2 registers.</span></div><div class="line"><a name="l00303"></a><span class="lineno">  303</span>&#160;<span class="preprocessor">#define INT2_CFG                        0x34</span></div><div class="line"><a name="l00304"></a><span class="lineno">  304</span>&#160;<span class="preprocessor">#define INT2_CFG_ANDOR                  BIT_7</span></div><div class="line"><a name="l00305"></a><span class="lineno">  305</span>&#160;<span class="preprocessor">#define INT2_CFG_INT_6D                 BIT_6</span></div><div class="line"><a name="l00306"></a><span class="lineno">  306</span>&#160;<span class="preprocessor">#define INT2_CFG_ZHIE                   BIT_5</span></div><div class="line"><a name="l00307"></a><span class="lineno">  307</span>&#160;<span class="preprocessor">#define INT2_CFG_ZLIE                   BIT_4</span></div><div class="line"><a name="l00308"></a><span class="lineno">  308</span>&#160;<span class="preprocessor">#define INT2_CFG_YHIE                   BIT_3</span></div><div class="line"><a name="l00309"></a><span class="lineno">  309</span>&#160;<span class="preprocessor">#define INT2_CFG_YLIE                   BIT_2</span></div><div class="line"><a name="l00310"></a><span class="lineno">  310</span>&#160;<span class="preprocessor">#define INT2_CFG_XHIE                   BIT_1</span></div><div class="line"><a name="l00311"></a><span class="lineno">  311</span>&#160;<span class="preprocessor">#define INT2_CFG_XLIE                   BIT_0</span></div><div class="line"><a name="l00312"></a><span class="lineno">  312</span>&#160;</div><div class="line"><a name="l00313"></a><span class="lineno">  313</span>&#160;<span class="preprocessor">#define INT2_SRC                        0x35</span></div><div class="line"><a name="l00314"></a><span class="lineno">  314</span>&#160;<span class="preprocessor">#define INT2_SRC_IA                     BIT_6</span></div><div class="line"><a name="l00315"></a><span class="lineno">  315</span>&#160;<span class="preprocessor">#define INT2_SRC_ZH                     BIT_5</span></div><div class="line"><a name="l00316"></a><span class="lineno">  316</span>&#160;<span class="preprocessor">#define INT2_SRC_ZL                     BIT_4</span></div><div class="line"><a name="l00317"></a><span class="lineno">  317</span>&#160;<span class="preprocessor">#define INT2_SRC_YH                     BIT_3</span></div><div class="line"><a name="l00318"></a><span class="lineno">  318</span>&#160;<span class="preprocessor">#define INT2_SRC_YL                     BIT_2</span></div><div class="line"><a name="l00319"></a><span class="lineno">  319</span>&#160;<span class="preprocessor">#define INT2_SRC_XH                     BIT_1</span></div><div class="line"><a name="l00320"></a><span class="lineno">  320</span>&#160;<span class="preprocessor">#define INT2_SRC_XL                     BIT_0</span></div><div class="line"><a name="l00321"></a><span class="lineno">  321</span>&#160;</div><div class="line"><a name="l00322"></a><span class="lineno">  322</span>&#160;<span class="preprocessor">#define INT2_THS                        0x36</span></div><div class="line"><a name="l00323"></a><span class="lineno">  323</span>&#160;<span class="preprocessor">#define INT2_THS_THS6                   BIT_6</span></div><div class="line"><a name="l00324"></a><span class="lineno">  324</span>&#160;<span class="preprocessor">#define INT2_THS_THS5                   BIT_5</span></div><div class="line"><a name="l00325"></a><span class="lineno">  325</span>&#160;<span class="preprocessor">#define INT2_THS_THS4                   BIT_4</span></div><div class="line"><a name="l00326"></a><span class="lineno">  326</span>&#160;<span class="preprocessor">#define INT2_THS_THS3                   BIT_3</span></div><div class="line"><a name="l00327"></a><span class="lineno">  327</span>&#160;<span class="preprocessor">#define INT2_THS_THS2                   BIT_2</span></div><div class="line"><a name="l00328"></a><span class="lineno">  328</span>&#160;<span class="preprocessor">#define INT2_THS_THS1                   BIT_1</span></div><div class="line"><a name="l00329"></a><span class="lineno">  329</span>&#160;<span class="preprocessor">#define INT2_THS_THS0                   BIT_0</span></div><div class="line"><a name="l00330"></a><span class="lineno">  330</span>&#160;</div><div class="line"><a name="l00331"></a><span class="lineno">  331</span>&#160;<span class="preprocessor">#define INT2_DURATION                   0x37</span></div><div class="line"><a name="l00332"></a><span class="lineno">  332</span>&#160;<span class="preprocessor">#define INT2_DURATION_D6                BIT_6</span></div><div class="line"><a name="l00333"></a><span class="lineno">  333</span>&#160;<span class="preprocessor">#define INT2_DURATION_D5                BIT_5</span></div><div class="line"><a name="l00334"></a><span class="lineno">  334</span>&#160;<span class="preprocessor">#define INT2_DURATION_D4                BIT_4</span></div><div class="line"><a name="l00335"></a><span class="lineno">  335</span>&#160;<span class="preprocessor">#define INT2_DURATION_D3                BIT_3</span></div><div class="line"><a name="l00336"></a><span class="lineno">  336</span>&#160;<span class="preprocessor">#define INT2_DURATION_D2                BIT_2</span></div><div class="line"><a name="l00337"></a><span class="lineno">  337</span>&#160;<span class="preprocessor">#define INT2_DURATION_D1                BIT_1</span></div><div class="line"><a name="l00338"></a><span class="lineno">  338</span>&#160;<span class="preprocessor">#define INT2_DURATION_D0                BIT_0</span></div><div class="line"><a name="l00339"></a><span class="lineno">  339</span>&#160;</div><div class="line"><a name="l00340"></a><span class="lineno">  340</span>&#160;<span class="comment">// Click interrupt registers.</span></div><div class="line"><a name="l00341"></a><span class="lineno">  341</span>&#160;<span class="preprocessor">#define CLICK_CFG                       0x38</span></div><div class="line"><a name="l00342"></a><span class="lineno">  342</span>&#160;<span class="preprocessor">#define CLICK_CFG_ZD                    BIT_5</span></div><div class="line"><a name="l00343"></a><span class="lineno">  343</span>&#160;<span class="preprocessor">#define CLICK_CFG_ZS                    BIT_4</span></div><div class="line"><a name="l00344"></a><span class="lineno">  344</span>&#160;<span class="preprocessor">#define CLICK_CFG_YD                    BIT_3</span></div><div class="line"><a name="l00345"></a><span class="lineno">  345</span>&#160;<span class="preprocessor">#define CLICK_CFG_YS                    BIT_2</span></div><div class="line"><a name="l00346"></a><span class="lineno">  346</span>&#160;<span class="preprocessor">#define CLICK_CFG_XD                    BIT_1</span></div><div class="line"><a name="l00347"></a><span class="lineno">  347</span>&#160;<span class="preprocessor">#define CLICK_CFG_XS                    BIT_0</span></div><div class="line"><a name="l00348"></a><span class="lineno">  348</span>&#160;</div><div class="line"><a name="l00349"></a><span class="lineno">  349</span>&#160;<span class="preprocessor">#define CLICK_SRC                       0x39</span></div><div class="line"><a name="l00350"></a><span class="lineno">  350</span>&#160;<span class="preprocessor">#define CLICK_SRC_IA                    BIT_6</span></div><div class="line"><a name="l00351"></a><span class="lineno">  351</span>&#160;<span class="preprocessor">#define CLICK_SRC_DCLICK                BIT_5</span></div><div class="line"><a name="l00352"></a><span class="lineno">  352</span>&#160;<span class="preprocessor">#define CLICK_SRC_SCLICK                BIT_4</span></div><div class="line"><a name="l00353"></a><span class="lineno">  353</span>&#160;<span class="preprocessor">#define CLICK_SRC_SIGN                  BIT_3</span></div><div class="line"><a name="l00354"></a><span class="lineno">  354</span>&#160;<span class="preprocessor">#define CLICK_SRC_Z                     BIT_2</span></div><div class="line"><a name="l00355"></a><span class="lineno">  355</span>&#160;<span class="preprocessor">#define CLICK_SRC_Y                     BIT_1</span></div><div class="line"><a name="l00356"></a><span class="lineno">  356</span>&#160;<span class="preprocessor">#define CLICK_SRC_X                     BIT_0</span></div><div class="line"><a name="l00357"></a><span class="lineno">  357</span>&#160;</div><div class="line"><a name="l00358"></a><span class="lineno">  358</span>&#160;<span class="preprocessor">#define CLICK_THS                       0x3A</span></div><div class="line"><a name="l00359"></a><span class="lineno">  359</span>&#160;<span class="preprocessor">#define CLICK_THS_LIR_CLICK             BIT_7</span></div><div class="line"><a name="l00360"></a><span class="lineno">  360</span>&#160;<span class="preprocessor">#define CLICK_THS_THS6                  BIT_6</span></div><div class="line"><a name="l00361"></a><span class="lineno">  361</span>&#160;<span class="preprocessor">#define CLICK_THS_THS5                  BIT_5</span></div><div class="line"><a name="l00362"></a><span class="lineno">  362</span>&#160;<span class="preprocessor">#define CLICK_THS_THS4                  BIT_4</span></div><div class="line"><a name="l00363"></a><span class="lineno">  363</span>&#160;<span class="preprocessor">#define CLICK_THS_THS3                  BIT_3</span></div><div class="line"><a name="l00364"></a><span class="lineno">  364</span>&#160;<span class="preprocessor">#define CLICK_THS_THS2                  BIT_2</span></div><div class="line"><a name="l00365"></a><span class="lineno">  365</span>&#160;<span class="preprocessor">#define CLICK_THS_THS1                  BIT_1</span></div><div class="line"><a name="l00366"></a><span class="lineno">  366</span>&#160;<span class="preprocessor">#define CLICK_THS_THS0                  BIT_0</span></div><div class="line"><a name="l00367"></a><span class="lineno">  367</span>&#160;</div><div class="line"><a name="l00368"></a><span class="lineno">  368</span>&#160;<span class="preprocessor">#define TIME_LIMIT                      0x3B</span></div><div class="line"><a name="l00369"></a><span class="lineno">  369</span>&#160;<span class="preprocessor">#define TIME_LATENCY                    0x3C</span></div><div class="line"><a name="l00370"></a><span class="lineno">  370</span>&#160;<span class="preprocessor">#define TIME_WINDOW                     0x3D</span></div><div class="line"><a name="l00371"></a><span class="lineno">  371</span>&#160;<span class="preprocessor">#define ACT_THS                         0x3E</span></div><div class="line"><a name="l00372"></a><span class="lineno">  372</span>&#160;<span class="preprocessor">#define ACT_DUR                         0x3F</span></div><div class="line"><a name="l00373"></a><span class="lineno">  373</span>&#160;</div><div class="line"><a name="l00374"></a><span class="lineno">  374</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* __DRV_ACC_LIS3DH_TYPES_H__ */</span><span class="preprocessor"></span></div><div class="line"><a name="l00375"></a><span class="lineno">  375</span>&#160;</div><div class="ttc" id="group__lis3dh__acc_html_gaf5e10f607b847f3b716c9ec38d151cc9"><div class="ttname"><a href="group__lis3dh__acc.html#gaf5e10f607b847f3b716c9ec38d151cc9">HPFilterMode_t</a></div><div class="ttdeci">HPFilterMode_t</div><div class="ttdoc">High-pass filter modes. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:125</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga47b3efbcdf74ade8db84a79cbe0a6208a5f77f4fa40d8d8bfde98bb017c555bed"><div class="ttname"><a href="group__lis3dh__acc.html#gga47b3efbcdf74ade8db84a79cbe0a6208a5f77f4fa40d8d8bfde98bb017c555bed">FULLSCALE_2</a></div><div class="ttdoc">2 G full scale. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:80</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggaf5e10f607b847f3b716c9ec38d151cc9a8dea92e23405fb11e8b5515d6fe5e337"><div class="ttname"><a href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a8dea92e23405fb11e8b5515d6fe5e337">HPNormalRes</a></div><div class="ttdoc">Normal mode, reference register reset when read. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:127</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga27fa536bd7810818a8e1c3f40b20a559abb0f1ea6dfe7b72208878f088f9f363b"><div class="ttname"><a href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559abb0f1ea6dfe7b72208878f088f9f363b">IntOR</a></div><div class="ttdoc">Sources are ORed. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:99</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gad2021482d4a30768e22af92782a56a3c"><div class="ttname"><a href="group__lis3dh__acc.html#gad2021482d4a30768e22af92782a56a3c">AXISenable_t</a></div><div class="ttdeci">AXISenable_t</div><div class="ttdoc">Axis selection. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:88</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga0e9afd8ad27de0920d1fe0738834869ca89fb9bb7746edff5df4e510e45a901c7"><div class="ttname"><a href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca89fb9bb7746edff5df4e510e45a901c7">ODR_25Hz</a></div><div class="ttdoc">High resolution/normal/low power mode 25 Hz. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:58</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga12c0d2c58f6ec2f4f2b2af14681e532fa2abda45f1b1e5bbe193611fb41ae7dfa"><div class="ttname"><a href="group__lis3dh__acc.html#gga12c0d2c58f6ec2f4f2b2af14681e532fa2abda45f1b1e5bbe193611fb41ae7dfa">POWER_DOWN</a></div><div class="ttdoc">Acclerometer powered down. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:71</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga0e9afd8ad27de0920d1fe0738834869ca3c93731a8c7fd26b42d3c1c7e0e04a16"><div class="ttname"><a href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca3c93731a8c7fd26b42d3c1c7e0e04a16">ODR_10Hz</a></div><div class="ttdoc">High resolution/normal/low power mode 10 Hz. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:57</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga27fa536bd7810818a8e1c3f40b20a559a7a261cd8c207e17b3776e8ad97c4e400"><div class="ttname"><a href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a7a261cd8c207e17b3776e8ad97c4e400">Int4DPos</a></div><div class="ttdoc">4 direction position interrupt. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:104</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ga0e9afd8ad27de0920d1fe0738834869c"><div class="ttname"><a href="group__lis3dh__acc.html#ga0e9afd8ad27de0920d1fe0738834869c">ODR_t</a></div><div class="ttdeci">ODR_t</div><div class="ttdoc">Output Data Rates (ODR). </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:54</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga0e9afd8ad27de0920d1fe0738834869ca651251b680468ae6418ce5e4881dd77f"><div class="ttname"><a href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca651251b680468ae6418ce5e4881dd77f">ODR_1Hz</a></div><div class="ttdoc">High resolution/normal/low power mode 1 Hz. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:56</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggaf5e10f607b847f3b716c9ec38d151cc9a29c408165112bfcbb9b17bcf2c16de68"><div class="ttname"><a href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a29c408165112bfcbb9b17bcf2c16de68">HPNormal</a></div><div class="ttdoc">Normal mode. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:129</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gae04a01b91dcf6d67ac00cc8170bfa69a"><div class="ttname"><a href="group__lis3dh__acc.html#gae04a01b91dcf6d67ac00cc8170bfa69a">IntPolarity_t</a></div><div class="ttdeci">IntPolarity_t</div><div class="ttdoc">Interrupt pin polarity. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:109</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggad2021482d4a30768e22af92782a56a3cadd16b30f2ce9d92c86b0ba1c205cc1a1"><div class="ttname"><a href="group__lis3dh__acc.html#ggad2021482d4a30768e22af92782a56a3cadd16b30f2ce9d92c86b0ba1c205cc1a1">Y_ENABLE</a></div><div class="ttdoc">Y axis enabled. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:91</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ga27fa536bd7810818a8e1c3f40b20a559"><div class="ttname"><a href="group__lis3dh__acc.html#ga27fa536bd7810818a8e1c3f40b20a559">IntMode_t</a></div><div class="ttdeci">IntMode_t</div><div class="ttdoc">Interrupt modes. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:97</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga27fa536bd7810818a8e1c3f40b20a559a9106def51953964bf1c2c243ef23e3b6"><div class="ttname"><a href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a9106def51953964bf1c2c243ef23e3b6">Int6DPos</a></div><div class="ttdoc">6 direction position change interrupt. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:102</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga27fa536bd7810818a8e1c3f40b20a559a9f809ea4bc2b111d3b9ec0da8e0178d8"><div class="ttname"><a href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a9f809ea4bc2b111d3b9ec0da8e0178d8">IntAND</a></div><div class="ttdoc">Sources are ANDed. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:101</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggae04a01b91dcf6d67ac00cc8170bfa69aacd6a326dbdded6bdcfd811349bed5f15"><div class="ttname"><a href="group__lis3dh__acc.html#ggae04a01b91dcf6d67ac00cc8170bfa69aacd6a326dbdded6bdcfd811349bed5f15">IntActiveLow</a></div><div class="ttdoc">Active low interrupt. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:112</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga12c0d2c58f6ec2f4f2b2af14681e532fa04ef9c54bf8fecf6499edcc41b7281d7"><div class="ttname"><a href="group__lis3dh__acc.html#gga12c0d2c58f6ec2f4f2b2af14681e532fa04ef9c54bf8fecf6499edcc41b7281d7">LOW_POWER</a></div><div class="ttdoc">Low power mode. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:72</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga0e9afd8ad27de0920d1fe0738834869ca52b611011f7bd3c0c447fc69c124d431"><div class="ttname"><a href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca52b611011f7bd3c0c447fc69c124d431">ODR_100Hz</a></div><div class="ttdoc">High resolution/normal/low power mode 100 Hz. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:60</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggaab84012c26574a34c9334e573449a939a2388ba9f829a37d6a38577dbd72465d0"><div class="ttname"><a href="group__lis3dh__acc.html#ggaab84012c26574a34c9334e573449a939a2388ba9f829a37d6a38577dbd72465d0">ClickSingle</a></div><div class="ttdoc">Single-click interrupt. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:119</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggaf5e10f607b847f3b716c9ec38d151cc9a07c4040b2477d3236a1749674a5a8ceb"><div class="ttname"><a href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a07c4040b2477d3236a1749674a5a8ceb">HPReference</a></div><div class="ttdoc">Reference mode. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:128</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga0e9afd8ad27de0920d1fe0738834869ca96068b1baf9cd8b2e3e4fcff8e79ba65"><div class="ttname"><a href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca96068b1baf9cd8b2e3e4fcff8e79ba65">ODR_50Hz</a></div><div class="ttdoc">High resolution/normal/low power mode 50 Hz. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:59</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga47b3efbcdf74ade8db84a79cbe0a6208abeb6a19fedf0e0040edb155604835625"><div class="ttname"><a href="group__lis3dh__acc.html#gga47b3efbcdf74ade8db84a79cbe0a6208abeb6a19fedf0e0040edb155604835625">FULLSCALE_4</a></div><div class="ttdoc">4 G full scale. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:81</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga47b3efbcdf74ade8db84a79cbe0a6208ad940ff642b6bc620056dc8f8b2292b6a"><div class="ttname"><a href="group__lis3dh__acc.html#gga47b3efbcdf74ade8db84a79cbe0a6208ad940ff642b6bc620056dc8f8b2292b6a">FULLSCALE_8</a></div><div class="ttdoc">8 G full scale. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:82</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggad2021482d4a30768e22af92782a56a3ca5f85fe49503ce8658180147c5fe4208f"><div class="ttname"><a href="group__lis3dh__acc.html#ggad2021482d4a30768e22af92782a56a3ca5f85fe49503ce8658180147c5fe4208f">Z_ENABLE</a></div><div class="ttdoc">Z axis enabled. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:92</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggad2021482d4a30768e22af92782a56a3ca7e45205907f6c1ac72454ce21f06853f"><div class="ttname"><a href="group__lis3dh__acc.html#ggad2021482d4a30768e22af92782a56a3ca7e45205907f6c1ac72454ce21f06853f">X_ENABLE</a></div><div class="ttdoc">X axis enabled. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:90</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga0e9afd8ad27de0920d1fe0738834869cac7b7c0d5277d1af336dfc9cc8209b45f"><div class="ttname"><a href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869cac7b7c0d5277d1af336dfc9cc8209b45f">ODR_400Hz</a></div><div class="ttdoc">High resolution/normal/low power mode 400 Hz. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:62</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga27fa536bd7810818a8e1c3f40b20a559a617b1566d064a8d14f765c303e373237"><div class="ttname"><a href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559a617b1566d064a8d14f765c303e373237">Int4DMov</a></div><div class="ttdoc">4 direction movement interrupt. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:103</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga0e9afd8ad27de0920d1fe0738834869ca2ed2f9480618e711bbaa902ab5ac8da5"><div class="ttname"><a href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca2ed2f9480618e711bbaa902ab5ac8da5">ODR_1344Hz_NP_5367HZ_LP</a></div><div class="ttdoc">High resolution/normal mode 1344 Hz, low power mode 5376 Hz. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:64</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggaab84012c26574a34c9334e573449a939a7a664a848258eae3246bab07acb9d945"><div class="ttname"><a href="group__lis3dh__acc.html#ggaab84012c26574a34c9334e573449a939a7a664a848258eae3246bab07acb9d945">ClickDouble</a></div><div class="ttdoc">Double-click interrupt. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:120</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggaf5e10f607b847f3b716c9ec38d151cc9a22ef545df51e65a06c8e7e01f7393607"><div class="ttname"><a href="group__lis3dh__acc.html#ggaf5e10f607b847f3b716c9ec38d151cc9a22ef545df51e65a06c8e7e01f7393607">HPAutoResInt</a></div><div class="ttdoc">Autoreset upon interrupt. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:130</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ga12c0d2c58f6ec2f4f2b2af14681e532f"><div class="ttname"><a href="group__lis3dh__acc.html#ga12c0d2c58f6ec2f4f2b2af14681e532f">Mode_t</a></div><div class="ttdeci">Mode_t</div><div class="ttdoc">Operation modes. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:69</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga27fa536bd7810818a8e1c3f40b20a559ac97c6350bafea7d79fbafe042e1fe4d6"><div class="ttname"><a href="group__lis3dh__acc.html#gga27fa536bd7810818a8e1c3f40b20a559ac97c6350bafea7d79fbafe042e1fe4d6">Int6DMov</a></div><div class="ttdoc">6 direction movement interrupt. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:100</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga12c0d2c58f6ec2f4f2b2af14681e532fa50d1448013c6f17125caee18aa418af7"><div class="ttname"><a href="group__lis3dh__acc.html#gga12c0d2c58f6ec2f4f2b2af14681e532fa50d1448013c6f17125caee18aa418af7">NORMAL</a></div><div class="ttdoc">Normal mode. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:73</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga47b3efbcdf74ade8db84a79cbe0a6208ad0c02778ca8c518a5e741817453106e8"><div class="ttname"><a href="group__lis3dh__acc.html#gga47b3efbcdf74ade8db84a79cbe0a6208ad0c02778ca8c518a5e741817453106e8">FULLSCALE_16</a></div><div class="ttdoc">16 G full scale. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:83</div></div>
<div class="ttc" id="struct_acc_axes_raw__t_html"><div class="ttname"><a href="struct_acc_axes_raw__t.html">AccAxesRaw_t</a></div><div class="ttdoc">Acceleration data struct. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:135</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ga47b3efbcdf74ade8db84a79cbe0a6208"><div class="ttname"><a href="group__lis3dh__acc.html#ga47b3efbcdf74ade8db84a79cbe0a6208">Fullscale_t</a></div><div class="ttdeci">Fullscale_t</div><div class="ttdoc">Acceleration ranges. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:78</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga0e9afd8ad27de0920d1fe0738834869cafd7430b471127a6b595bcbf166bf8618"><div class="ttname"><a href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869cafd7430b471127a6b595bcbf166bf8618">ODR_1620Hz_LP</a></div><div class="ttdoc">Low power mode, 1620 Hz. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:63</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gga0e9afd8ad27de0920d1fe0738834869ca9f6133db3f2734f33ae2ca76ab4ef2ad"><div class="ttname"><a href="group__lis3dh__acc.html#gga0e9afd8ad27de0920d1fe0738834869ca9f6133db3f2734f33ae2ca76ab4ef2ad">ODR_200Hz</a></div><div class="ttdoc">High resolution/normal/low power mode 200 Hz. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:61</div></div>
<div class="ttc" id="group__lis3dh__acc_html_gaab84012c26574a34c9334e573449a939"><div class="ttname"><a href="group__lis3dh__acc.html#gaab84012c26574a34c9334e573449a939">ClickMode_t</a></div><div class="ttdeci">ClickMode_t</div><div class="ttdoc">Click interrupt modes. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:117</div></div>
<div class="ttc" id="group__lis3dh__acc_html_ggae04a01b91dcf6d67ac00cc8170bfa69aae1edcead6e4d2fe417f6802d2da8ace7"><div class="ttname"><a href="group__lis3dh__acc.html#ggae04a01b91dcf6d67ac00cc8170bfa69aae1edcead6e4d2fe417f6802d2da8ace7">IntActiveHigh</a></div><div class="ttdoc">Active hight interrupt. </div><div class="ttdef"><b>Definition:</b> drv_acc_lis3dh_types.h:111</div></div>
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